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Eisenbarth, Thomas
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Test Vector Leakage Assessment Development
Creator:
Valme, Romuald S
Advisor:
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2016-11-06
Resource Type:
Major Qualifying Project
Wearable Honeypot
Creator:
Leonard, Andrew Michael
Advisor:
Eisenbarth, Thomas
and
Venkatasubramanian, Krishna Kumar
Publisher:
Worcester Polytechnic Institute
Date Created:
2015-04-29
Resource Type:
Major Qualifying Project
Wearable Honeypot
Creator:
Ali, Mudassir Mohammed
Advisor:
Eisenbarth, Thomas
and
Venkatasubramanian, Krishna Kumar
Publisher:
Worcester Polytechnic Institute
Date Created:
2015-03-25
Resource Type:
Major Qualifying Project
IQP Strong Authentication
Keyword:
Risk management
,
Human-computer interaction
, and
User-centered system design
Creator:
Valme, Romuald S
,
Mokotoff, Andrew Jack
,
Nguyen, Cuong Hung
, and
Caso, Nathan M
Advisor:
Smith, Alexander D.
and
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2016-03-04
Resource Type:
Interactive Qualifying Project
Side Channel Leakage Exploitation, Mitigation and Detection of Emerging Cryptosystems
Keyword:
Side channel attack
,
post-quantum crypto
,
t-test
, and
Threshold Implementations
Creator:
Chen, Cong
Advisor:
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2018-03-26
Resource Type:
Dissertation
Degree:
PhD
Unit (Department):
Electrical & Computer Engineering
Threshold Implementations of the Present Cipher
Keyword:
Cryptography
,
Masking
,
Threshold implementation
,
Countermeasure
,
Present cipher
,
FPGA
,
Side channel countermeasure
, and
Lightweight cryptography
Creator:
Farmani, Mohammad
Advisor:
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2017-09-06
Resource Type:
Thesis
Degree:
MS
Unit (Department):
Electrical & Computer Engineering
Side-Channel Attacks on Intel SGX: How SGX Amplifies The Power of Cache Attack
Keyword:
trusted execution environment
,
side-channel
,
Attack
,
SGX
,
cache attack
,
Security
,
Cryptography
,
key recovery
,
AES
,
TEE
,
T-Table
, and
cache
Creator:
Moghimi, Ahmad
Advisor:
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2017-04-27
Resource Type:
Thesis
Degree:
MS
Unit (Department):
Computer Science
Efficient Side-channel Resistant MPC-based Software Implementation of the AES
Keyword:
multiparty computation
,
AES
,
polynomial masking
, and
side-channel analysis
Creator:
Fernandez Rubio, Abraham
Advisor:
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2017-04-27
Resource Type:
Thesis
Degree:
MS
Unit (Department):
Electrical & Computer Engineering
Cross-core Microarchitectural Attacks and Countermeasures
Keyword:
Side Channel Attacks
,
Microarchitectural attacks
, and
cache attacks
Creator:
Irazoki, Gorka
Advisor:
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2017-04-24
Resource Type:
Dissertation
Degree:
PhD
Unit (Department):
Electrical & Computer Engineering
Implicit Cache Lockdown on ARM: An Accidental Countermeasure to Cache-Timing Attacks
Keyword:
cache-timing
,
cross-core
,
cache
,
ARM
,
Security
,
Countermeasure
,
lockdown
, and
side-channel
Creator:
Green, Marc
Advisor:
Eisenbarth, Thomas
Publisher:
Worcester Polytechnic Institute
Date Created:
2017-01-20
Resource Type:
Thesis
Degree:
MS
Unit (Department):
Computer Science
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Ali, Mudassir Mohammed
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Eisenbarth, Thomas
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Smith, Alexander D.
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3
Venkatasubramanian, Krishna Kumar
3
Wyglinski, Alexander
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Ding, Adam
1
Eisenbarth, Thomas
10
Fei, Yunsi
1
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Project Center
MIT Lincoln Laboratory-Lexington, Massachusetts Project Center - MQP
1
MITRE-Bedford, Massachusetts Project Center - MQP
3
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Computer Science
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22
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Major Qualifying Project
11
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