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Filtering by: Advisor McNeill, John A. Contributor McNeill, John A.

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List Gallery Masonry Slideshow

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A 12-b 50Msample/s Pipeline Analog to Digital Converter

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A 2.5 GHz Optoelectronic Amplifier in 0.18 m CMOS

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Settling Time Measurement Techniques Achieving High Precision at High Speeds

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Jitter in Oscillators with 1/f Noise Sources and Application to True RNG for Cryptography

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"Applying the ""Split-ADC"" Architecture to a 16 bit, 1 MS/s ...

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Split Cyclic Analog to Digital Converter Using A Nonlinear Gain Stage

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A 16-b 10Msample/s Split-Interleaved Analog to Digital Converter

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All Digital, Background Calibration for Time-Interleaved and Successive Approximation...

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Circuit Design for Realization of a 16 bit 1MS/s Successive Approximation Register Ana...

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Split Non-Linear Cyclic Analog-to-Digital Converter