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McNeill, John A.
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A 12-b 50Msample/s Pipeline Analog to Digital Converter
A 2.5 GHz Optoelectronic Amplifier in 0.18 m CMOS
Settling Time Measurement Techniques Achieving High Precision at High Speeds
"Applying the ""Split-ADC"" Architecture to a 16 bit, 1 MS/s ...
Split Cyclic Analog to Digital Converter Using A Nonlinear Gain Stage
A 16-b 10Msample/s Split-Interleaved Analog to Digital Converter
Circuit Design for Realization of a 16 bit 1MS/s Successive Approximation Register Ana...
Split Non-Linear Cyclic Analog-to-Digital Converter
Background Calibration of a 6-Bit 1Gsps Split-Flash ADC
Lookup-Table-Based Background Linearization for VCO-Based ADCs
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Creator
Brenneman, Cody R.
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Calvo, Carlos Roberto
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Carter, Nathan R
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Chan, Ka Yan
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Crasso, Anthony
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Advisor
McNeill, John A.
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11
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Bitar, Stephen J.
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Brown D. Richard, III
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Eisenbarth, Thomas
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Huang, Xinming
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Klein, Andrew
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Unit (Department)
Electrical & Computer Engineering
11
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Worcester Polytechnic Institute
11
Resource type
Thesis
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