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Klein, Andrew
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Calibration
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Circuit Design for Realization of a 16 bit 1MS/s Successive Approximation Register Analog-to-Digital Converter
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"Applying the ""Split-ADC"" Architecture to a 16 bit, 1 MS/s differential Successive Approximation Analog-to-Digital Converter"
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Masters Theses
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Creator
Brenneman, Cody R.
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Chan, Ka Yan
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McNeill, John A.
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Bitar, Stephen J.
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Klein, Andrew
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McNeill, John A.
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Unit (Department)
Electrical & Computer Engineering
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Worcester Polytechnic Institute
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Thesis
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