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Calibration
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Masters Theses
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Background Calibration of a 6-Bit 1Gsps Split-Flash ADC
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Circuit Design for Realization of a 16 bit 1MS/s Successive Approximation Register Analog-to-Digital Converter
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"Applying the ""Split-ADC"" Architecture to a 16 bit, 1 MS/s differential Successive Approximation Analog-to-Digital Converter"
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Atomic Force Microscopy: Lateral-Force Calibration and Force-Curve Analysis
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Masters Theses
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Creator
Anderson, Evan V
1
Brenneman, Cody R.
1
Chan, Ka Yan
1
Crasso, Anthony
1
Advisor
Burnham, Nancy A.
1
Camesano, Terri Anne
1
McNeill, John A.
3
Contributor
Bitar, Stephen J.
3
Brown D. Richard, III
1
Burnham, Nancy A.
1
Camesano, Terri Anne
1
Klein, Andrew
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Unit (Department)
Electrical & Computer Engineering
3
Physics
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Publisher
Worcester Polytechnic Institute
4
Resource type
Thesis
4