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Filtrado por: Palabra clave Look Up Table

FPGA Accelerated SAT Solver

Palabra clave:

Boolean SAT, FPGA, MQP, Look Up Table, and CDCL

Creador:

Mao, Xinyun, David, Samuel, Eben, Joshua, and Hunter, Patrick

Advisor:

Doroz, Yarkin and Mus, Koksal

Editor:

Worcester Polytechnic Institute

Fecha de Creacion:

2024-04-25

Resource Type:

Major Qualifying Project