A Reinforcement Learning Approach To Optimize the MLC Prefetcher Aggressiveness at Run-Time

Adiletta, Matthew J.

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A Reinforcement Learning Approach To Optimize the MLC Prefetcher Aggressiveness at Run-Time

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Top technology companies are in a computational “arms race,” employing big-data analytics, and deriving insights from deep-learning. They are also experiencing Jevons paradox: by providing an efficient use for a resource (compute), demand for that resource is increasing. Resulting from Jevons paradox, compute demand is at an all-time high and growing. The combined impact of Moore’s Law (transistor density) and Dennard Scaling (power density) drove rapid advancements in technology and society. However, industry is reaching the limits of Moore and Dennard, thus it is imperative to seek new technologies for continued performance increase. One approach for improving the performance of systems of high complexity is to use machine learning to “tune-the-machine.” Current computer systems and component microarchitectures are designed to be static, such that the implementation is “good” for as many workloads as possible. These systems usually are workload agnostic and are statically tuned for the largest net of workloads but might not be the most optimal for any given workload. This research realizes a means to allow hardware intellectual property to use real time telemetry data to adjust “knobs”. Adjusting a “knob” allows a block to morph functionally or structurally to gain optimal performance for a given workload or stream. By using machine learning (ML) algorithms which track the stream of data or instructions, this research presents a means to modify the operation of a block to maintain optimal performance. This study focused on adjusting knobs for the memory subsystems, specifically the hardware prefetchers. A hierarchical model employing reinforcement learning was designed to tune the performance of the hardware prefetcher knobs at run time. This model improved the IPC performance over the baseline configuration by 18.0% on a set of prefetch sensitive traces in a cycle-accurate simulator.

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