NVIDIA: Software Safety Assurance for the Boot Power Management Processor on the Tegra SoC

Harrison, Robert Alexander; Deva, Goutham Om; Rao, Tejas

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NVIDIA: Software Safety Assurance for the Boot Power Management Processor on the Tegra SoC

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NVIDIA’s Tegra System-on-a-Chip (SoC) contains a small coprocessor responsible for initializing every other component of the chip, called the Boot Power Management Processor (BPMP). NVIDIA intends to deploy the Tegra SoC inside autonomous vehicles, and therefore needs to refactor the code running on each of the SoC’s components to comply with international safety standards. Our project is to assist the Tegra System Software team with these changes by writing unit tests, refactoring individual modules, and writing documentation on each functional module in the system. In the end, we performed each of these tasks successfully, contributing over five thousand lines of changes and writing one full set of architecture and design documents.

This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.

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