CFAR detection is an essential filtering component in modern radar systems. Conventionally, this filtering is performed using general purpose CPUs. Modern FPGAs offer what CPUs do not: parallelism. The goal of this project was to implement conventional CFAR algorithms on the FPGA platform for high performance, and further, develop and implement a previously unexplored algorithm involving histogram sorting.

• This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.

Creator

• Sartoris, Larry S.
• Varshney, Vivek C.
• Bold, Nicholas

Publisher

• Worcester Polytechnic Institute

Identifier

• 06A012M

Advisor

• Clements, Kevin A.
• King, Brian M.

Year

• 2006

Center

• MIT Lincoln Laboratory-Lexington, Massachusetts Project Center - MQP

Sponsor

• MIT Lincoln Laboratory

Date created

• 2006-01-01

Resource type

• Major Qualifying Project

Major

• Electrical Engineering
• Electrical & Computer Engineering

Rights statement

• In Copyright